Description

The Peripheral Core Solution (PCS) provides two types of usage: the first one as a “coprocessor” like system (slave mode), and the second (standalone mode) as a true peripheral reconfigurable core with “Input/Output” port. This solution can be used if your processor has not a coprocessor interface or if you want to use the “Input/Ouput” interface for your application as shown in figure below.

Features

The features include:

- 32-bit AHB master or slave interfaces, compliant with AMBA 2.0 specification

- Soft, Hard and Firm IP Cores available for integration into FPGAs and ASICs

- Fully synthesizable, technology independent soft cores (uses standard cells)

- Multi-context capability which allows dynamic switching of configuration in a single clock cycle

- Basic Element modularity from function generators (LUT) to hard module (adder, multiplier, memory, etc.)

- API to easily configure and exploit the eFPGA core with the processor

- Menta tools: Profiling, Debug, Place & Route, Simulation